1. Field of the Invention
The present invention relates to a hybrid resin-sealed semiconductor device for use as a power device, and more particularly to a hybrid resin-sealed semiconductor device wherein wires extending from a plurality of semiconductor chips mounted on a heat sink can intersect one another without causing any problem.
2. Description of the Related Art
A Hybrid resin-sealed semiconductor device, wherein a coil or other structural components are not monolithically formed on a semiconductor chip, is known as one type of semiconductor device. It is commercially available and is used in various technical fields. In the case where the hybrid resin-sealed semiconductor device comprises a power element requiring a large amount of power, a lead frame made up mainly of a heat sink is used as a casing. Normally, a pair of semiconductor devices of the same type are mounted on the heat sink. In some cases, however, a power integrated circuit device such as a power IC or a Darlington circuit device and a general semiconductor device such as an MOS IC, a bipolar IC, or a logic device are mounted on the heat sink in combination.
FIG. 1A is a perspective view of a lead frame 30 used for fabricating a conventional hybrid resin-sealed semiconductor device. The lead frame 30 is obtained by pressing a conductive metallic plate. The specific construction of the lead frame 30 is as follows:
A plurality of heat sinks 32 are provided between a pair of first frames 31 arranged in parallel to each other. A plurality of second frames 33a are also provided between the first frames 31 in such a manner that each second frame 33a is located between the adjacent heat sinks 32 and extends perpendicular to the first frames 31. Further, internal leads 33b are arranged perpendicular to the second frames 33a. One end of each internal lead 33b is free, while the other end is located above the region in the neighborhood of the center of the heat sink 32. Normally, the second frames 33a and the internal leads 33b are integrally formed as one body. As can be seen in FIG. 1A, the heat sinks 32 are located slightly lower than the first frames 31. A pair of projections 32a are formed on each side of the heat sink 32, and a pair of through-holes 31a are formed in each of the first frames 31. After fitting the projections 32a in the respective through-holes 31a, those through-holes 31a are crushed flat, thereby fixing the heat sink 32 and the first frames 32 together.
As is shown in FIG. 2, a pair of power ICs, that is, semiconductor chips 36 of the same type are mounted on the heat sink 32 in an ordinary manner (only one of the power ICs being shown in FIG. 2). Next, the pair of semiconductor chips 36 are secured to the heat sink 32 by use of an adhesive layer 37. Thereafter, the lead frame 30 is subjected to a bonding step. An active or passive region is formed in the power ICs 36 by doping the impurities. In the bonding step, at least one of the electrodes, wiring layers, and pads electrically connected to the active or passive region is connected to the internal lead 33b by means of a thin metallic wire 29. The electrodes, wiring layers, or pads are normally connected to external elements. Hereinafter, all portions, including the above three, that are subjected to bonding will be referred to simply as electrodes. In the bonding step, ordinary ball bonding or ultrasonic ball bonding is utilized. As is shown in FIGS. 2 and 3, the bonding first performed with respect to the thin metallic wire is ball bonding, and the bonding performed next is wedge bonding. The bonding with respect to the thin metallic wire is completed by performing these two kinds of bonding.
Since a hybrid resin-sealed semiconductor device includes various circuit components, a grounded point must be used in common to a plurality of power ICs, and the circuit components must be connected together in a predetermined fashion. As is shown in FIG. 2, therefore, a plurality of insulating substrates 38, formed of glass epoxy resin, are formed on the mounting positions on the heat sink 32. The insulating substrate 38 is secured to the heat sink 32 by use of the insulating adhesive material 28. The thin metallic wires 29 are used as jumpers. Prior to the bonding step, conductive coatings 40 are formed on the tops of insulating substrates 38 by deposition, and insulating layers 41 are provided for the prevention of a short circuit. In addition, as shown in FIG. 3, interlayer insulating film 42 is formed on about a half of the surface of each conductive coating 40 which is formed on insulating substrate 38. A second conductive layer 43 may be formed on the interlayer insulating film 42, for the connection between electrodes of the power ICs 36 if it is necessary. The distance between the insulating substrate 38 and the power IC 36 must be at least 0.2 mm. In the case where two insulating substrates 38 are formed, they are spaced from each other by at least 0.5 mm, and thin metallic wires 29 formed of Al, Au or Cu and having a diameter in the range between 25 .mu.m and 50 .mu.m are employed. An insulating protection film (not shown) is formed on both the conductive coatings 40 and the second conductive layer 43, so as to prevent coatings 40 and layer 43 from undesirably short-circuiting to other thin metallic wires 29.
With respect to the lead frame 30 fabricated as above, a normal resin sealing step is performed by use of the transfer mold process. Thereafter, the lead frame 30 is subjected to a cut and bend step to thus complete a semiconductor device.
As may be understood from the above, if the wires extending from the circuit portions on the insulating substrates intersect one another, a short circuit may be caused. To solve this problem, the following measures have been conventionally adopted: (1) to arrange the wires three-dimensionally by employing an insulating substrate comprising a conductive multi layer; and (2) to use the thin metallic wires as jumpers. However, measure (1) results in a high manufacturing cost since conductive layers have to be formed as a laminated structure. Measure (2) also results in a high manufacturing cost, due to an increase in the number of steps required. More specifically, if jumpers 29 are arranged over two conductive coatings 40, as is shown in FIG. 2, the wires have to be coated with an insulating protection material, so as to prevent a short circuit between the jumpers 29 and the conductive coatings 40 at the time of the resin sealing step.